As one of Georgia Tech’s Interdisciplinary Research Institutes, the Institute for Electronics Nanotechnology (IEN) operates and supports the region’s most extensive core research laboratories in several campus buildings.  Hands-on, shared user cleanroom space totals 28,500 square feet in the Marcus and Pettit buildings. These cleanrooms are general use for electronics, MEMS, photonics, and materials research, along with a specialized class 100 bays for work at the interface between fabrication and life sciences.  Additional laboratories under IEN administration include the Laser Machining Lab, for micro-machining of diverse materials (polymers, glasses, ceramics, metals, and organics) using UV and IR laser sources, and a Teaching Cleanroom dedicated to support advanced training and lab courses taught in the areas of CMOS fabrication, MEMS, and micro/nanoelectronic processing.

 

Major Fabrication Tools

All of the more than 200 individual tools, with substrate capabilities up to 150mm, within the IEN tool-set are accessible to both internal and external clients for hands-on use. Training requests, scheduling, and routine communications are all handled through a web-based interface, and in-the- lab access is controlled with an in-house developed electronic access control system which documents all usage for subsequent billing and statistical analysis.

The major tool categories are:

  • Lithography/Patterning: UV Photolithography (365nm, 405nm, 248nm), Nano-imprint, E-beam Lithography, Inkjet Printing, Soft Lithography, PDMS
  • Dry Etching: Silicon/Polysilicon DRIE , Silicon/Polysilicon RIE, Silicon Dioxide (quartz, fused silica) DRIE, Silicon Nitride DRIE, III-V Semiconductor DRIE, RIE;  Metal RIE (Various  gasses available for processing needs.)
  • Wet Etching: Semiconductors, Dielectrics, Metals, Organic Materials
  • High Temperature Processes: Oxidation, Annealing, Polymer Curing, Diffusion Doping, Drive-in, Sintering, Rapid Thermal Processing
  • Thin Film Deposition: RF/DC Sputtering, Co-sputtering, Evaporation, ALD, PECVD, APCVD, LPCVD
  • Polymer Deposition: Spin Coating, Spray Coating, CVD (Parylene)
  • Plating: Electroplating & Electroless Plating (Various metals may be accessed, based on your process needs.)
  • Packaging: Wire bonding, Wafer bonding, Anodic bonding, Thermal compression bonding, Eutectic bonding, Flip-Chip bonding, Chemical Mechanical Polishing, Lapping, Lamination
Director Contact: Gary Spinner

Senior Assistant Director - Lab Ops
Institute for Electronics and Nanotechnology
Georgia Institute of Technology
Phone: 404.894.4010
E-mail: gary.spinner@ien.gatech.edu
 

Visit the Cleanroom Website Here